iExploreSiliconValley.com

Kashif Javaid

In this lesson we will focus on a single element Lossless Transmission line (T-line) as shown in Figure 1. Lossless T line simulation will be introduced here. One of the goal of these lessons are to give out practical examples from real world. Transmission line model real world signals very well. This lesson focus on the Lossless T-line where no power gets dissipated during transmission. In a future lesson, we will focus on lossy line and loss mechanics.

Figure 1: LTspice symbol

What is transmission line? A transmission line is any conductor along with a return path where a signal travel from source to load. Because of finite speed of light, a signal takes a finite amount of time called Time Delay (TD) to go from source to load. Signal sees a characteristic impedance (Zo) based on geometry and dielectric around the conductor and return path. For an in-depth review of transmission line, please refer some excellent references as given at the end.

In any simulation we need to build confidence on the models given. One way to do this is find solution of easy problems by hand for cases a formula or numerical values can be derived and then compare them with results from simulation. Once 100% agreement is established, one can go beyond simple situation and start modeling real world effects. In the case of transmission line, let’s look at 4 simple but common cases, where a 50Ω T-line is driven by a CMOS driver with 5Ω source impedance (typical for newer drivers) with an open load, short load, 100Ω load and a properly terminated 50Ω load. 

For each case, we will look at the load voltage waveform using bounce diagram. If you haven’t learned or played with bounce diagrams, do not fret, we will walk through it step by step.

First case: Load = Open or Hi-Z

For an open load situation, let’s start to build a bounce or reflection diagram for the below open circuit:

Figure 2: CMOS driver with low impedance driving 50Ω line with no load.

Observations:

1. In any circuit, there is signal path and return path which is as important as signal path.
2. After the long time meaning several transit time (TD) has been passed, T-line has becomes ideal and since load is open or Hi-Z, voltage at RL will approach 3.3V, after all it’s an open and no current can flow.
3. Getting to final 3.3V would take several TD (illustrated below by creating bounce diagram step by step section and LTspice simulation).
4. Reflection coefficients at load and source are calculated in Figure 3.
5. Reflection coefficient is 1 for an open load case. A

Figure 3: Formula and calculation of Reflection at source and load.

Building Bounce Diagram one TD a time:

Bounce or reflection diagram consist of two axises. Horizontal axis represent location on transmission line and goes from z=0 to z=d where d is actual length of transmission line. Vertical lines represent time and marked as in unit of time delay (TD).  We draw a first line representing the signal launched into transmission line. Note V⁺  and I⁺ represent the initial waveform voltage and current signal. These signals encounter the impedance of the line, in this case 50Ω. V⁺ is calculated using the voltage divider formula as 3.3V(50Ω/(50Ω+5Ω)) = 3V and I as  V⁺/Zo. 

Similarly V^– and I^– show reflected voltage and current waveforms respectively. These are calculated using Load reflection coefficient. Similarly V⁺⁺ and I⁺⁺ are calculated using generator reflection coefficient and represent reflected waveforms from source after 2 TD. The “tennis match” continues as illustrated in the series of diagrams below:

Figure 4: Building up the bounce diagram

I intentionally picked this example as source and load side impedances are severely mismatched. In-fact load is open with infinite resistance. I think we have enough data to make comparison with LTspice. Here is the load voltage waveform by hand if you were to put an oscilloscope at the load side, this is what we will measured. Of-course, this is not complete as final value should be 3.3V, but it will take several more bounces before it reaches this value, but we let LTspice handle it.

Figure 5: Building up the load voltage waveform

Here are LTspice results:

Figure 6: LTspice simulation for open load transmission line

As marked on the waveform, first 6 Time Delay (TD) values are agreed 100% to our calculated values. But notice that it takes several bounces back and forth actually more than 50ns before a steady state value of 3.3V reached. First time I learned this it was really surprising, but it is a direct consequence of finite speed of light and mismatch between source and load impedance.

Second case: Load=0Ω or short

Second interesting case is when load is shorted after the transmission. Since load is shorted, output voltage should be zero, but it will be current that will build up to its final value according to ohm law, I = 3.3V/5 = 0.66A.

Figure 7: Transmission line for shorted output,  note very small value of resistance is used for probing otherwise LTspice won’t give us the current waveform at the load.

Let’s calculate first few TD using the bounce diagram and then we let LTspice calculate the rest of it.

Figure 8: Bounce diagram and current waveform. y-axis is current in Amp and x-axis is time in unit of TD. 

Here are LTspice results. Note the agreement between calculated and simulation values. One thing to note is that since we used a very small resistance (just think of resistance of the wire) at the output, voltage will be also climb up like this which you can easily verify it using the attached simulation files.

Figure 9: Simulation results of shorted load

Third case: Load=100Ω

This is a typical case where where T-line is driving 50 ohm line with load impedance of 100Ω.

Figure 9: 50Ω Transmission line driving a 100Ω load

Here is the bounce diagram and LTspice simulation results for this case:

Figure 10: 50Ω Transmission line driving a 100Ω load and its bounce diagram and LTspice simulation results

Fourth case: Load=50Ω

If load is matched with characteristic impedance there will be no reflection and perfect matching will occur. In-fact this is one of a termination scheme in the high speed digital logic circuits. Bounce diagram is very boring, but it show after 1 time delay of latency signal will reach its equivalent value of 3.3*(50/55)=3V. Notice this 50Ω termination has reduce the output voltage by 300mV and will eat up the noise margin. Also, high power consumption is the second factor with this scheme. That’s why other termination schemes are typically employed but this topic warrant its own post.

Figure 10: 50Ω Transmission line driving a 50Ω matching load

Here is the bounce diagram:

Figure 10: 50Ω Transmission line driving a 50Ω matching load, output voltage, after 1ns of TD, reaches is final value of 3V.

In essence, learning any simulation tool is basically checking fundamental equations and methods against it. Only then one can advance to more complicated and real-world modeling. Hope this post not only show how to simulate transmission line but gives out a good refresher on bounce diagram. Please feel free to post any comments, I will continue to improve on these lessons. Next lesson: Generate Electronic Sources.

Download LTspice file: Tline_3_cases.asc

References:

Gregory D. Durgin, Andrew F. Peterson, Transient Signals on Transmission Lines: An Introduction to Non-Ideal Effects and Signal Integrity Issues in Electrical Systems, ISBN-10: 1598298259

Bogatin, Eric Signal and Power Integrity – Simplified (3rd Edition), ISBN-10: 013451341X

If you want to discuss it then jump here:

https://www.eevblog.com/forum/projects/ltspice-lesson-3-transmission-lines-part-1/new/#new

LTspice command: .op

Node voltage and Mesh current are methods that systematically calculate voltages and currents in a circuit. Although LTspice calculate voltages and currents by using sophisticated network theory, but nonetheless, it can be useful to match the node voltages and mesh currents with hand calculation as required to do so in a first year elementary circuit courses. Mesh current and Node voltage examples here are purely for academic purpose. The goal here is to introduce .op command. It perform a dc operating point analysis and calculate all the node voltages and branch currents in a given circuit. 

Following simple circuit is used to illustrate the mesh current analysis by hand:

To get mesh currents from the Ltpsice .op analysis, one has to make sure to get the branch current that is isolated and matches with its mesh current counterpart. For example, current going through 10V source is same as mesh current I1 except polarity is reversed. This is because LTspice takes the current direction into the voltage source. Here is LTspice example for the above hand analysis.

Here is the simple node voltage analysis of the same circuit. Reading the node voltage in LTspice is exactly the same as node voltage calculation by hand given reference node is the same in both cases.

To sum up, the point of this post was to illustrate .op spice statement and how it can calculate dc voltages and currents in a give circuit topology. As an example, Mesh current and Node voltage methods were used in a simple circuit.

If you want to discuss it further, please jump here:

https://www.eevblog.com/forum/projects/ltspice-for-ee-students/

Kashif Javaid

“Never perform a measurement or simulation without first anticipating the results you expect to see.” ~Eric Bogatin’s Rule # 9

Learn these spice commands: .dc .param

In these 10 lesson series, we will explore LTspice circuit simulator. Assumption is that you’re a beginner or someone who already plays around with it a bit and feel it has potential to solve circuit problems, and perhaps provide intuition and insight how electronic circuits works. Ultimately, it will help solve a real world EE problem and continue to provide a quick go to tool for a quick circuit simulation of some proof of concept.

The approach we will take is that we will never simulate a circuit unless we know what output we expect to see. This is beautifully captured by world-renowned signal integrity expert Eric Bogatin rule # 9. [1]

First of all, why start with IV curves? Voltage-Currrent (aka IV) relationship of a component can tell us a lot about behavior of that component. In a nutshell, by applying a voltage across its terminal and measuring the resulted current, one can figure out the resistance or more generally impedance of the component. Later this knowledge can lead to electrical models which can help design and predict the behavior of a circuit. This  is a good starting point as we will get to know immediately two of most important LTspice simulation commands: .dc and .param

We will look at IV curves of following components:

1. Resistor
2. Diode
3. NPN and PNP BJT
4. NMOS and PMOS MOSFET
5. Solar cell

We will be using following 5 steps approach for each of the circuit in these tutorials:

Step 1: Draw a circuit. 

Step 2: Add proper dot simulation command.

Step 3. Predict its behavior.

Step 4: Simulate and verify behavior with your prediction.

Step 5: (Optional) Repeat step 3 if result doesn’t match prediction and extend the example for some other use case or different parameters.

RESISTOR

Let’s start things with a lonely resistor and it’s IV curve. True to rule # 9, a resistor is related with voltage and current through ohm law: V=I*R or I = V / R. This is in the form of y = m*x form where m = 1/R is the slope. So if we vary a voltage from 1V to 2V we expect to see a current proportional to 1/R. This means if resistor is huge (i.e ~MΩ range), current would be small compared to if resistor is small (i.e ten’s of ohm). Let’s see if we can verify it using LTspice.

Step 1:

I am not going to layout exact steps for how to find these components. Just mess around and find them yourself and wire it up like this. Tip, you can find most of generic component in this toolbar link:

*If you want to take a short cut, you will find all the .asc files at the end.

Here is a simple schematic where resistor and voltage source are wired as below. Note the variable X in curly bracket. We will use it to vary the value of R1.

Step 2:

We will start with following two simulation commands: .dc and.param

.dc V1 Lin -10 10 .1

The syntax is almost readable and follow the format of .dc <Voltage or Current source> <Start value> <Stop Value>  <increment>. In this case we want to sweep voltage source V2 linearly from -10V to +10V with increment of 100mV. Ltspice provide a useful dialog box which can also be used enter these values:

Now let’s a take a look at this command

.step param X list 100 1k

Again the syntax is readable and allow a source or parameter to vary by a list of values or some increment. In this case, we want to step our X variable which correspond to R1 value in the schematic for two values 100Ω and 1kΩ.

Step 3: 

As mentioned earlier, low value resistor will be able to pass lot more current and curve will be close to current axis in accord with the ohm law. A high value resistor will pass low current thus its curve should be close to voltage axis.

Step 4:

Run the simulation with clicking on the running man in the tool bar: . After simulation run without an error, point the cursor on the resistor until a current probe appears and click it. This will plot voltage vs current plots on the plot window with two defined resistor values:

Notice as expected R1=10Ω is close to current axis when compared with R1=100Ω as we have predicted from the ohm law. Granted this is a extremely simple example, but it will help with more complicated circuit in which reasoning remain the same but formula gets more complex.

Step 5:

Let’s go one step further and create IV curves by varying R1 from 1Ω to 100Ω with increment of 1Ω. How does the .param command will change? How long it takes for simulation to plots these curves? I will leave this as an exercise, but prediction remain the same and curves are shown below: Actual simulation file .asc attached if you want to play along. R_IV_2.asc

DIODE

Step 1 and 2:

Step 3:

Lets add a .dc command to simulate diode IV. Notice, 1N4148 is real diode, but it should follow diode equation:

We expect to see an exponential curve as we vary VD. Click on the diode when cursor become a current probe to following plot:

Step 4:

Notice, VD can be varied at any arbitrary voltage, but since this is a real diode it adheres to absolute maximum rating as per its datasheet:

Simulation gives a false sense of putting any voltage across diode, but in-fact if power dissipation gets exceeded, expect to see smoke in a real circuit build. LTspice won’t gives any warning. It is your job as a circuit designer to adhere to any datahseet limits.

Step 5:

Let’s extend the above example to simulate the effect of temperature. As diode equation predict and both VT and Is are function of temperature, we expect to see at higher temperature current rise earlier than room temperature. In order word diode will switch faster. As an example add following command to effect of temperature on this real world diode.

.step temp list -40 25 85

BIPOLAR JUNCTION TRANSISTOR (BJT)

From this point on, I will combine all the steps here. Since a transistor is 3-terminal device, you have to make the one terminal constant current or voltage value while varying the other one. For typical IV curves, we make the base current constant while varying the VCE of the transistor. Then we can do it for multiple value of base current. The .dc command shown below the circuit. We expect to see a triode region and saturation region.

NPN

PNP

bipolar.asc

Metal Oxide Semiconductor Field Effect Transistor (MOSFET)

Note the convention used above where PMOS is source is tied to highest positive rail.

mosfet.asc

ami_c5n_corner_bsim3.txt

SOLAR CELL

An excellent paper that discusses the solar cell simulation using datasheet parameters is given below.

Simulation of Single-Diode

A simplified Rseries and Rshunt model of solar cell is given below. Just click on the V1 while cursor in current probe mode to run the simulation.

solar_iv.asc

Conclusion.

This just scratches the surface of LTspice capability and a good starting point to get familiarize with some basic commands. Next tutorial will focus on DC circuit analysis.

If you want to discuss it further, please jump here:

https://www.eevblog.com/forum/projects/ltspice-for-ee-students/